The present disclosure relates to a semiconductor memory and, more particularly, to a wordline driving circuit and method for a semiconductor memory.
Semiconductor memories are devices in which data can be stored and from which the stored data can be read as necessary. The semiconductor memories can be classified into a random access memory (RAM) and a read only memory (ROM). The RAM is a volatile memory that needs power supplied to it to retain data. The ROM is a nonvolatile memory that can retain data even without power supply. Examples of the RAM are a dynamic RAM (DRAM) and a static RAM (SRAM). Examples of the ROM are a programmable ROM (PROM), an erasable PROM (EPROM), an electrically EPROM (EEPROM), and a flash memory.
A semiconductor memory includes a cell array with a plurality of memory cells. Each of the memory cells is connected to a wordline and a bitline. The semiconductor memory includes a wordline driving circuit for supplying a wordline voltage to a selected wordline. For example, a DRAM cell includes a capacitor and a metal oxide semiconductor (MOS) transistor. A wordline is connected to a gate of the MOS transistor. A wordline voltage, provided to the gate of the MOS transistor, is provided from a wordline driving circuit.
With the increase in the integration and speed of the semi conductor memory, a high voltage (VPP) level in the semiconductor memory increasingly affects the reliability of the semiconductor memory. In order to have a high reliability of the semiconductor memory, the VPP level must be controlled and prevented from being unintentionally reduced due to, for example, a leakage current.
The wordline driving circuit of the semiconductor memory includes a pull-up driver for supplying a high voltage to a selected wordline. Generally, the pull-up driver includes a PMOS transistor. In a standby state, a source and a drain of the PMOS transistor are set to a low level. In this case, when a high voltage is applied to a gate of the PMOS transistor, a leakage current is generated due to gate-induced drain leakage (GIDL).
As well known to those of ordinary skill in the art, when a high voltage is applied to a gate of the MOS transistor and a low-level voltage is applied to a source and a drain of the MOS transistor, GIDL occurs to generate a leakage current, referred to as a GIDL current. The GIDL current degrades the driving performance of the wordline driving circuit. Furthermore, the influence of the GIDL current on the wordline driving circuit increases with the high integration of the semiconductor memory.